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AMD launched its 4th gen EPYC 9004-series CPUs last November to critical acclaim, with hugely improved performance over their 3rd gen 7003-series predecessors. Later on, AMD expanded the range with special X models with massively expanded Level 3 cache of over a gigabyte for scientific computing workloads.

A large part of the attraction of EPYC 9004, both the original standard models and later X models, was the maximum core count of 96, way beyond anything Intel could offer with its Xeon CPUs. AMD’s latest EPYC 9704 CPUs, codename Bergamo, extend AMD’s lead even further, with an incredible 128 cores on offer.

This leap forward in core density is made possible by adjusting the Zen 4 architecture in 96-core EPYCs into a new variant called Zen 4c. The benefit of this approach is that Zen 4 and Zen 4c EPYCs all use the same SP5 socket and so work in the same servers, helping to keep costs down.

The biggest difference between Zen 4 and Zen 4c, no pun intended, is that the latter has less Level 3 cache – 2MB per core rather than the usual 4MB. The resulting Zen 4c die is a considerably more compact and has shorter trace lengths than Zen 4.

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